PCIe Memory Map
Undefined memory locations will be read as 0xDEADDEAD. BAR0 size on the FPGA is 20 bits. References in the range BAR0[0x00820000] to BAR0[0x00FFFFFF] are to "external" memory, which is the interface outside of SOPC builder.
| Address Range | Description |
|---|---|
| 0x00000000 - 0x00003FFF | PCIe Avalon-MM Bridge Register Map |
| 0x00004000 - 0x0000403F | Interval Timer |
| 0x00800000 - 0x0080FFFF | DMA interface Descriptor Table |
| 0x00810000 | Version Register (Currently 0x0001010A) |
| 0x00810004 | Control and Status Register |
| 0x00810008 | Descriptor Table Pointers |
| 0x0081000C | Frame Counter (number of descriptors processed) |
| 0x00810010 | IRQ Status Register |
| 0x00810014 | IRQ Mask Register |
| 0x00810020 | Microsecond Counter (read only) |
| 0x00820008 | Data Pump Control Register |
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