The NAS7825 provides 32 GPIOA lines, and some additional GPIOB lines in another set of registers. Each bit can be individually configured for either input or output. You can directly set or clear the values by writing 0's or 1's to GPIO_A_OUTPUT_VALUE, but this requires masking so as not to affect the other bits. So it is easier to set or clear using the GPIO_A_OUTPUT_SET or GPIO_A_OUTPUT_CLEAR registers.
Several of the CPU GPIO lines are routed to general purpose I/O on the FPGA. These are defined for the following functions:
| GPIO | Description |
|---|---|
| GPIOA0 | 0=Boot Mode; 1=SMI Mode |
| GPIOA1 | RS422 Rx FIFO Empty Flag |
| GPIOA2 | RS422 Tx FIFO Full Flag |
| GPIOA9 | |
| GPIOA10 | Reset Switch (set when P22 ADC goes low to high; cleared on high to low) |
| GPIOA11 | |
| GPIOA26 | |
| GPIOA27 | |
| GPIOA28 | |
| GPIOA29 | RS422 Rx FIFO Reset |